Circuits & Systems Classroom

Interactive Playground
ADC

Aliasing and Nyquist zones

See where tones and harmonics land after sampling.

ADC

Binary vs redundant SAR

Explore SAR decisions, redundancy and weight calibration.

ADC

Pipeline ADC

Follow the input interval from stage to stage, and connect residue distortion to DNL and INL.

ADC

Nonlinear calibration

Learn an inverse, test on new data, and see what clipping and limited training cannot recover.

ADC

Analog output analysis panel

Read one ADC capture through twelve synchronized diagnostic views.

ADC

Time-interleaved ADCs

See where channel mismatch, jitter and harmonics land in the spectrum.

PLL

PLL introduction

Watch phase feedback lock an oscillator; explore loop speed, damping and the integral path.

PLL

Integer-N vs fractional-N

See why integer-N lands on a channel grid and fractional-N does not.

PLL

Bang-bang PLL

A one-bit phase detector: watch the frequency slew, the limit cycle, and how jitter turns the sign into a gain.

Circuits & Systems

Open-loop to closed-loop

Use feedback to trade gain for bandwidth in a single-pole amplifier.

SerDes

112G PAM4 SerDes link

Follow PAM4 symbols through a 3-D chip-to-chip link and equalize the eye.

SerDes

Clock and data recovery

A guided tour from the ground up: why a receiver must find its own clock, how a CDR steers by the data edges, and what it cannot follow.

SerDes

PCI Express

A guided tour of a PCIe link in 3-D: lanes and generations, packets in their envelopes, resends after an error, and credits that keep the receiver from overflowing.

Circuits & Systems

Bode plots & stability

Explore poles, zeros and responses; verify marginal stability independently.

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